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<h2 id="interface-pcih">Interface <code class="language-plaintext highlighter-rouge">pci.h</code></h2>

<p>This interface presents a series of helpers when using the VMM PCI Driver. These helpers assisting with
the creation of pci device entries and accessors the their configuration spaces.</p>

<h3 id="brief-content">Brief content:</h3>

<p><strong>Functions</strong>:</p>

<blockquote>
  <p><a href="#function-vmm_pci_entry_ignore_writecookie-offset-size-value"><code class="language-plaintext highlighter-rouge">vmm_pci_entry_ignore_write(cookie, offset, size, value)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_mem_device_readcookie-offset-size-result"><code class="language-plaintext highlighter-rouge">vmm_pci_mem_device_read(cookie, offset, size, result)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_mem_device_writecookie-offset-size-value"><code class="language-plaintext highlighter-rouge">vmm_pci_mem_device_write(cookie, offset, size, value)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-define_pci_host_bridgebridge"><code class="language-plaintext highlighter-rouge">define_pci_host_bridge(bridge)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_create_passthroughaddr-config"><code class="language-plaintext highlighter-rouge">vmm_pci_create_passthrough(addr, config)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_create_bar_emulationexisting-num_bars-bars"><code class="language-plaintext highlighter-rouge">vmm_pci_create_bar_emulation(existing, num_bars, bars)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_create_irq_emulationexisting-irq"><code class="language-plaintext highlighter-rouge">vmm_pci_create_irq_emulation(existing, irq)</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#function-vmm_pci_create_cap_emulationexisting-num_caps-cap-num_ranges-range_starts-range_ends"><code class="language-plaintext highlighter-rouge">vmm_pci_create_cap_emulation(existing, num_caps, cap, num_ranges, range_starts, range_ends)</code></a></p>
</blockquote>

<p><strong>Structs</strong>:</p>

<blockquote>
  <p><a href="#struct-vmm_pci_device_def"><code class="language-plaintext highlighter-rouge">vmm_pci_device_def</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#struct-vmm_pci_bar"><code class="language-plaintext highlighter-rouge">vmm_pci_bar</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#struct-pci_bar_emulation"><code class="language-plaintext highlighter-rouge">pci_bar_emulation</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#struct-pci_irq_emulation"><code class="language-plaintext highlighter-rouge">pci_irq_emulation</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#struct-pci_passthrough_device"><code class="language-plaintext highlighter-rouge">pci_passthrough_device</code></a></p>
</blockquote>

<blockquote>
  <p><a href="#struct-pci_cap_emulation"><code class="language-plaintext highlighter-rouge">pci_cap_emulation</code></a></p>
</blockquote>

<h2 id="functions">Functions</h2>

<p>The interface <code class="language-plaintext highlighter-rouge">pci.h</code> defines the following functions.</p>

<h3 id="function-vmm_pci_entry_ignore_writecookie-offset-size-value">Function <code class="language-plaintext highlighter-rouge">vmm_pci_entry_ignore_write(cookie, offset, size, value)</code></h3>

<p>Helper write function that just ignores any writes</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">cookie {void *}</code>: User supplied PCI entry cookie</li>
  <li><code class="language-plaintext highlighter-rouge">offset {int}</code>: Offset into PCI device header</li>
  <li><code class="language-plaintext highlighter-rouge">size {int}</code>: Size of data to be written</li>
  <li><code class="language-plaintext highlighter-rouge">value {uint32_t}</code>: value to write to PCI device header offset</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li>Returns 0</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_mem_device_readcookie-offset-size-result">Function <code class="language-plaintext highlighter-rouge">vmm_pci_mem_device_read(cookie, offset, size, result)</code></h3>

<p>Read method for a PCI devices memory
@result {uint32_t *} result  Resulting value read back from PCI device header</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">cookie {void *}</code>: PCI device header</li>
  <li><code class="language-plaintext highlighter-rouge">offset {int}</code>: Offset into PCI device header</li>
  <li><code class="language-plaintext highlighter-rouge">size {int}</code>: Size of data to be read</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li>0 if success, -1 if error</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_mem_device_writecookie-offset-size-value">Function <code class="language-plaintext highlighter-rouge">vmm_pci_mem_device_write(cookie, offset, size, value)</code></h3>

<p>Write method for a PCI devices memory
@value {uint32_t} value      Value to write to PCI device header offset</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">cookie {void *}</code>: PCI device header</li>
  <li><code class="language-plaintext highlighter-rouge">offset {int}</code>: Offset into PCI device header</li>
  <li><code class="language-plaintext highlighter-rouge">size {int}</code>: Size of data to be read</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li>0 if success, -1 if error</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-define_pci_host_bridgebridge">Function <code class="language-plaintext highlighter-rouge">define_pci_host_bridge(bridge)</code></h3>

<p>Defines the configuration space values of the PCI host bridge</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">bridge {vmm_pci_device_def_t *}</code>: PCI bridge device definition</li>
</ul>

<p><strong>Returns:</strong></p>

<p>No return</p>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_create_passthroughaddr-config">Function <code class="language-plaintext highlighter-rouge">vmm_pci_create_passthrough(addr, config)</code></h3>

<p>Construct a pure passthrough device based on the real PCI. This is almost always useless as
you will almost certainly want to rebase io memory</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">addr {vmm_pci_address_t}</code>: Address of passthrough PCI device</li>
  <li><code class="language-plaintext highlighter-rouge">config {vmm_pci_config_t}</code>: Ops for accessing the passthrough config space</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">vmm_pci_entry_t</code> for passthrough device</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_create_bar_emulationexisting-num_bars-bars">Function <code class="language-plaintext highlighter-rouge">vmm_pci_create_bar_emulation(existing, num_bars, bars)</code></h3>

<p>Construct a pci entry that emulates configuration space bar read/write’s. The rest of the configuration space is passed on</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">existing {vmm_pci_entry_t}</code>: Existing PCI entry to wrap over and emulate its bar accesses</li>
  <li><code class="language-plaintext highlighter-rouge">num_bars {int}</code>: Number of emulated bars in PCI entry</li>
  <li><code class="language-plaintext highlighter-rouge">bars {vmm_pci_bar_t *}</code>: Set of bars to emulate access to</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">vmm_pci_entry_t</code> for emulated bar device</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_create_irq_emulationexisting-irq">Function <code class="language-plaintext highlighter-rouge">vmm_pci_create_irq_emulation(existing, irq)</code></h3>

<p>Construct a pci entry the emulates configuration space interrupt read/write’s. The rest of the configuration space is passed on</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">existing {vmm_pci_entry_t}</code>: Existing PCI entry to wrap over and emulate its IRQ accesses</li>
  <li><code class="language-plaintext highlighter-rouge">irq {int}</code>: IRQ line value in PCI entry</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">vmm_pci_entry_t</code> for emulated irq device</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="function-vmm_pci_create_cap_emulationexisting-num_caps-cap-num_ranges-range_starts-range_ends">Function <code class="language-plaintext highlighter-rouge">vmm_pci_create_cap_emulation(existing, num_caps, cap, num_ranges, range_starts, range_ends)</code></h3>

<p>Capability space emulation. Takes list of addresses to use to form a capability linked list, as well as a
ranges of the capability space that should be directly disallowed. Assumes a type 0 device.</p>

<p><strong>Parameters:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">existing {vmm_pci_entry_t}</code>: Existing PCI entry to wrap over and emulated it capability space accesses</li>
  <li><code class="language-plaintext highlighter-rouge">num_caps {int}</code>: Number of caps in capability space</li>
  <li><code class="language-plaintext highlighter-rouge">caps {uint8_t *}</code>: Capability list</li>
  <li><code class="language-plaintext highlighter-rouge">num_ranges {int}</code>: Number of disallowed/ignored capability ranges e.g. MSI capabilities</li>
  <li><code class="language-plaintext highlighter-rouge">range_starts {uint8_t *}</code>: Array of starting indexes of ignored capability ranges</li>
  <li><code class="language-plaintext highlighter-rouge">range_end {uint8_t *}</code>: Array of ending idexes of ignored capabilities range</li>
</ul>

<p><strong>Returns:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">vmm_pci_entry_t</code> with an emulated capability space</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h2 id="structs">Structs</h2>

<p>The interface <code class="language-plaintext highlighter-rouge">pci.h</code> defines the following structs.</p>

<h3 id="struct-vmm_pci_device_def">Struct <code class="language-plaintext highlighter-rouge">vmm_pci_device_def</code></h3>

<p>Struct definition of a PCI device. This is used for emulating a device from
purely memory reads. This is not generally useful on its own, but provides
a nice skeleton</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">vendor_id {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">device_id {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">command {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">status {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">revision_id {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">prog_if {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">subclass {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">class_code {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">cache_line_size {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">latency_timer {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">header_type {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bist {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar0 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar1 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar2 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar3 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar4 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">bar5 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">cardbus {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">subsystem_vendor_id {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">subsystem_id {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">expansion_rom {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">caps_pointer {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">reserved1 {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">reserved2 {uint16_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">reserved3 {uint32_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">interrupt_line {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">interrupt_pin {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">min_grant {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">max_latency {uint8_t}</code></li>
  <li><code class="language-plaintext highlighter-rouge">caps_len {int}</code></li>
  <li><code class="language-plaintext highlighter-rouge">caps {void *}</code></li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="struct-vmm_pci_bar">Struct <code class="language-plaintext highlighter-rouge">vmm_pci_bar</code></h3>

<p>Represents a PCI bar within a device</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">mem_type {pci_mem_type_t}</code>: Type of memory supporting PCI bar</li>
  <li><code class="language-plaintext highlighter-rouge">address {uintptr_t}</code>: Address of PCI bar</li>
  <li><code class="language-plaintext highlighter-rouge">size_bits {size_t}</code>: Size of PCI bar in bits</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="struct-pci_bar_emulation">Struct <code class="language-plaintext highlighter-rouge">pci_bar_emulation</code></h3>

<p>Wrapper datastructure over a pci entry and its configuration space. This is leveraged to emulate
BAR accesses in an entries configuration space
the guest OS over-writing elements in the configuration space</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">passthrough {vmm_pci_entry_t}</code>: PCI entry being emulated</li>
  <li><code class="language-plaintext highlighter-rouge">num_bars {int}</code>: Number of PCI bars</li>
  <li><code class="language-plaintext highlighter-rouge">bars {vmm_pci_bar_t}</code>: Set of PCI bars being emulated in the PCI entry</li>
  <li><code class="language-plaintext highlighter-rouge">bar_writes {uint32_t}</code>: Most recent write to each PCI bar in the configuration space. This avoids</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="struct-pci_irq_emulation">Struct <code class="language-plaintext highlighter-rouge">pci_irq_emulation</code></h3>

<p>Wrapper datastructure over a pci entry and its configuration space. This is leveraged to emulate
IRQ line accesses in an entries configuration space</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">passthrough {vmm_pci_entry_t}</code>: PCI entry being emulated</li>
  <li><code class="language-plaintext highlighter-rouge">irq {int}</code>: IRQ line value in PCI entry</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="struct-pci_passthrough_device">Struct <code class="language-plaintext highlighter-rouge">pci_passthrough_device</code></h3>

<p>Datastructure providing direct passthrough access to a pci entry configuration space</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">addr {vmm_pci_address_t}</code>: Address of PCI device</li>
  <li><code class="language-plaintext highlighter-rouge">config {vmm_pci_config_t}</code>: Ops for accessing config space</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<h3 id="struct-pci_cap_emulation">Struct <code class="language-plaintext highlighter-rouge">pci_cap_emulation</code></h3>

<p>Wrappper datastructure over a pci entry and its configuration space. This is leveraged to emulate
capabilities in an entries configuration space.</p>

<p><strong>Elements:</strong></p>

<ul>
  <li><code class="language-plaintext highlighter-rouge">passthrough {vmm_pci_entry_t}</code>: PCI entry being emulation</li>
  <li><code class="language-plaintext highlighter-rouge">num_caps {int}</code>: Number of caps in capability space</li>
  <li><code class="language-plaintext highlighter-rouge">caps {uint8_t *}</code>: Capability list</li>
  <li><code class="language-plaintext highlighter-rouge">num_ignore {int}</code>: Number of disallowed/ignored capability ranges e.g. MSI capabilities</li>
  <li><code class="language-plaintext highlighter-rouge">ignore_start {uint8_t *}</code>: Array of starting indexes of ignored capability ranges</li>
  <li><code class="language-plaintext highlighter-rouge">ignore_end {uint8_t *}</code>: Array of ending idexes of ignored capabilities range</li>
</ul>

<p>Back to <a href="#module-pcih">interface description</a>.</p>

<p>Back to <a href="#">top</a>.</p>


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